The invention relates to increasing the associated volume of polishing composition relative to contact area in chemical mechanical planarization processes.
Three-dimensional fixed abrasive polishing pads have been used in chemical mechanical planarization processes to planarize and polish dielectrics, metal lines and interconnects present on the surface of a wafer suited for fabrication of semiconductor devices. The three-dimensional structures on these polishing pads extend from a substrate surface in the form of circular posts, square posts, hexagonal posts, pyramids and truncated pyramids.
During many chemical mechanical planarization processes, a polishing composition is brought in contact with a semiconductor wafer surface. The polishing composition chemically modifies the wafer surface rendering the surface more amendable to removal. Fixed abrasive polishing pads and many particle slurry pad combinations used in chemical mechanical planarization processes work to remove the modified layer of the wafer and spent polishing composition, which enables the surface-modification/removal process to be repeated until the desired final properties of the wafer surface are obtained.
In one aspect, the invention features a method of chemically modifying a wafer suited for fabrication of semiconductor devices that includes a) contacting a surface of the wafer with an article that includes a plurality of unit cells repeating across the surface of the article, the individual unit cells including at least a portion of a three-dimensional structure and being characterized by a unit cell parameter as follows:
[[V1xe2x88x92Vs]/Aas]/{square root over (A)}uc greater than 5
where V1 is the volume defined by the area of the unit cell and the height of the structure of the unit cell, Vs is the volume of the structure of the unit cell, Aas is the apparent contact area of the structure of the unit cell, and Auc is the area of the unit cell, and b) moving at least one of the wafer and the article relative to each other in the presence of a polishing composition capable of chemically reacting with the surface of the wafer and being capable of either enhancing or inhibiting the rate of removal of at least a portion of the surface of the wafer.
In one embodiment, the portion of the wafer includes a chemically distinct phase of the wafer. In another embodiment, the unit cell includes a plurality of three-dimensional structures. In other embodiments [[V1xe2x88x92Vs]/Aas]/{square root over (A)}ucxe2x89xa710. In some embodiments [[V1xe2x88x92Vs]/Aas]/{square root over (A)}ucxe2x89xa715. In one embodiment [[V1xe2x88x92Vs]/Aas]/{square root over (A)}ucxe2x89xa720.
In another embodiment, at least one dimension that defines the apparent contact area of the structure is from 1 xcexcm to no greater than 500 xcexcm. In other embodiments, at least one dimension that defines the apparent contact area of the structure is from 1 xcexcm to no greater than 200 xcexcm. In another embodiment, the apparent contact area of an individual structure is from 1 xcexcm2 to 200,000 xcexcm2.
In one embodiment, the height of the structure is from 10 xcexcm to 500 xcexcm. In some embodiments, 15 xcexcmxe2x89xa7{square root over (A)}ucxe2x89xa72000 xcexcm.
In other embodiments the unit cell includes one three-dimensional structure. In another embodiment, the unit cell includes a number of three-dimensional structures. In some embodiments, the unit cell includes a portion of a number of three-dimensional structures.
In some embodiments, the article is a fixed abrasive article for modifying the surface of a wafer suited for fabrication of semiconductor devices and further includes a plurality of fixed abrasive structures located in a predetermined arrangement in a region of the article, the region being of a dimension sufficient to planarize the surface of a wafer suited for fabrication of semiconductor devices.
In another embodiment, the region includes at least about 10 structures/linear cm, at least about 50 structures/linear cm, or at least about 500 structures/linear cm.
In some embodiments, the three-dimensional structures are uniformly distributed in the region. In other embodiments, the three-dimensional structures are arranged in a pattern having a repeating period. In one embodiment, at least some of the three-dimensional structures are located in clusters.
In one embodiment, the three-dimensional structures further include a binder and abrasive particles disposed in the binder. In other embodiments, the three-dimensional structures are essentially free of inorganic abrasive particles. In an embodiment, the three-dimensional structures are essentially free of components reactive with a wafer.
In some embodiments, the three-dimensional structures are of a form selected from the group consisting of cubic posts, cylindrical posts, rectangular posts, prismatic, pyramidal, truncated pyramidal, conical, truncated conical, cross, hemispherical and combinations thereof. In one embodiment, the three-dimensional structures include a pyramidal form having sides of varying slope relative to the base of the pyramid. In another embodiment, substantially all of the three-dimensional structures have the same shape and dimensions.
In some embodiments, the three-dimensional structures are located on a polishing element and the article further includes a) a resilient element and b) a rigid element disposed between the polishing element and the resilient element. In another embodiment, the rigid element is bonded to the polishing element and the resilient element.
In one embodiment, the method includes planarizing the surface of the wafer suited for fabrication of semiconductor devices. In another embodiment, the method includes planarizing a metal surface (e.g., copper) of a wafer suited for fabrication of semiconductor devices. In other embodiments, the method includes planarizing a dielectric surface of a wafer suited for fabrication of semiconductor devices. In some embodiments, the method is substantially free of audible vibration.
In some embodiments, the method is conducted in the absence of inorganic abrasive particles. In other embodiments, the polishing composition includes abrasive particles. In another embodiment, the polishing composition is essentially free of abrasive particles.
In one embodiment, the method further includes removing at least about 500 Angstroms of material/minute from the surface of at least one wafer for a period of at least about 200 minutes. In other embodiments, the method further includes removing at least about 500 Angstroms of material/minute from the surface of at least one wafer and providing wafers having no greater than about 10% wafer non-uniformity.
In another embodiment, the structures include elongated prismatic structures. In another embodiment, the structures include elongated ridges.
In another aspect, the invention features a method of chemically modifying a wafer suited for fabrication of semiconductor devices and the method includes a) contacting the surface of the wafer with an article that includes a number of unit cells repeating across the surface of the article, the individual unit cells including at least a portion of a three-dimensional structure and being characterized by a unit cell parameter [[V1xe2x88x92Vs]/Aas]/{square root over (A)}uc greater than 1, where V1 is the volume defined by the area of the unit cell and the height of the structure of the unit cell, Vs is the volume of the structure of the unit cell, Aas is the apparent contact area of the structure of the unit cell, and Auc is the area of the unit cell, the three-dimensional structure being essentially free of inorganic abrasive particles, and b) moving at least one of the wafer and the article relative to each other in the presence of a polishing composition that is chemically reactive with the surface of the wafer and capable of either enhancing or inhibiting the rate of removal of at least a portion of the surface of the wafer.
In other aspects, the invention features an article for modifying the surface of a wafer suited for fabrication of semiconductor devices and the article includes a) a first element having a plurality of unit cells repeating across the surface of the article, the individual unit cells including at least a portion of a three-dimensional structure and being characterized by a unit cell parameter [[V1xe2x88x92Vs]/Aas]/{square root over (A)}uc greater than 1, where V1 is the volume defined by the area of the unit cell and the height of the structure of the unit cell, Vs is the volume of the structure of the unit cell, Aas is the apparent contact area of the structure of the unit cell, and Auc is the area of the unit cell, the three-dimensional structure being essentially free of inorganic abrasive particles, b) a relatively more resilient element, and c) a relatively more rigid element disposed between the first element and the resilient element.
In some embodiments, the three-dimensional structure is capable of contributing to the chemical modification of the surface of a wafer suited for fabrication of semiconductor devices. In one embodiment, the article is in the form of a web. In other embodiments, the article is in the form of a circular polishing pad.
In one aspect, the invention features an article that is suitable for use in chemical mechanical planarization processes and that includes an element that includes a number of unit cells repeating across the surface of the article, the individual unit cells including at least a portion of a three-dimensional structure that is essentially free of inorganic abrasive particles and is capable of contributing to the chemical modification of a surface of a wafer suited for fabrication of semiconductor devices, the unit cell is characterized by a unit cell parameter [[V1xe2x88x92Vs]/Aas]/{square root over (A)}uc greater than 1, where V1 is the volume defined by the area of the unit cell and the height of the structure of the unit cell, Vs is the volume of the structure of the unit cell, Aas is the apparent contact area of the structure of the unit cell, and Auc is the area of the unit cell. In some embodiments, the article further includes a relatively more resilient element, and a relatively more rigid element disposed between the relatively more resilient element and the first element.
In another aspect, the invention features an article that includes an element that includes a plurality of unit cells repeating across the surface of the article, the individual unit cells including at least a portion of a three-dimensional structure and being characterized by a unit cell parameter as follows:
[[V1xe2x88x92Vs]/Aas]/{square root over (A)}uc greater than 5
where V1 is the volume defined by the area of the unit cell and the height of the structure of the unit cell, Vs is the volume of the structure of the unit cell, Aas is the apparent contact area of the structure of the unit cell, and Auc is the area of the unit cell. In some embodiments, the three-dimensional structures include abrasive particles. In other embodiments, the three-dimensional structures are capable of contributing to the chemical modification of a surface of a wafer suited for fabrication of semiconductor devices. In one embodiment, the article further includes a relatively more resilient element and a relatively more rigid element disposed between the relatively more resilient element and the first element.
In another embodiment, the article is capable of removing at least about 500 Angstroms of material/minute from a wafer suited for fabrication of semiconductor devices for a period of at least about 200 minutes. In other embodiments, the article is capable of removing at least about 500 Angstroms of material/minute from surfaces of a plurality of wafers suited for fabrication of semiconductor devices and providing wafer surfaces having no greater than about 10% wafer non-uniformity. In some embodiments the article is in the form of a web. In other embodiments, the article is in the form of a circular polishing pad.
The term xe2x80x9cunit cellxe2x80x9d refers to the smallest unit of repeat of a two dimensional array of structures that tiles the plane of an article for modifying the surface of a wafer suited for fabrication of semiconductor devices. The unit cell is analogous to the unit cell of the crystallographic arts. The unit cell may require translation, rotation, reflection across a line or a point, and combinations thereof to tile the plane. There may be more than one unit cell that tiles the plane. In FIG. 1, for example, the smallest unit of repeat that tiles the plane of the article is a triangle. For purposes of this invention, an exception to the unit cell definition set forth above arises in the case of articles that include elongated parallel structures, i.e., structures having a greater length dimension than width dimension such that the ratio of the length dimension to the width dimension is at least 2:1 arranged parallel to each other. For articles that include elongated parallel structures, the unit cell is arbitrarily set as a square of the sum of the width of the structure plus the width of the spacing between the structures, i.e., the length dimension is arbitrarily selected to be equal to the sum of the width dimension of the structure plus the width dimension of the space between adjacent structures.
The phrase xe2x80x9capparent contact areaxe2x80x9d refers to the area of the top surface of an entity, e.g., a structure or a polishing pad, that appears to be capable of contacting a surface of a wafer suited for fabrication of semiconductor devices when the two entities are in contact with each other under some applied load. The actual area that contacts the surface of a wafer suited for fabrication of semiconductor devices, i.e., the real area of contact, is thought to be less than the apparent contact area.
The phrase xe2x80x9c% apparent bearing areaxe2x80x9d refers to the area on an article that constitutes the apparent contact area relative to the total planar area within a region of the article that is of a dimension suitable for planarizing the surface of a wafer suited for fabrication of semiconductor devices.
Polishing pads having unit cells that satisfy the equation [[V1xe2x88x92Vs]/Aas]/{square root over (A)}uc greater than 5 provide a sufficient amount of polishing composition to the surface of the wafer for a sufficient an amount of time to allow chemical reactions to occur at the surface of the wafer. The polishing pads also provide a number of surface wipes per unit time (i.e., the number of times the surface of the wafer is wiped with a structure from the polishing pad) sufficient to remove the spent chemistry, and other reaction by products, from the surface of the wafer and to expose a fresh surface for reaction. The polishing pad also provides good fluid flow and a sufficient volume of polishing composition such that fresh polishing composition is available for contact with the surface of the wafer during polishing operations.
The polishing pad also appears to transfer relatively lower total frictional forces to the carrier, exhibits good removal rate stability and provides good temperature control during polishing processes. In some embodiments, the polishing pad exhibits shorter pad break in times due to the decreased amount of apparent contact area that must be modified initially. In some embodiments, the polishing pads can provide reproducible removal rates for extended periods of polishing time.
Other structures of the invention will be apparent from the following description of preferred embodiments thereof, and from the claims.